==============================================================
Guild: wafer.space Community
Channel: ℹ️ - Information / general
Topic: Welcome to [wafer.space](https://wafer.space/) - 
documentation at [wafer.space github](https://github.com/wafer-space) - 
buy at [buy.wafer.space](https://buy.wafer.space) - 
archives at [discord.wafer.space](https://discord.wafer.space/)
After: 2026-08-31 11:59 p.m.
Before: 2026-10-01 12:00 a.m.
==============================================================

[2026-09-02 2:06 p.m.] saladchap
We've now got a partner who can do gold wire bonding - not the stud bumping though.

{Reactions}
👍

[2026-09-03 3:28 p.m.] essen__
Does someone know if we can have **core_VDD > IO_VDD** when using the ocd IO?


[2026-09-03 3:45 p.m.] essen__
Aside from the totally fair objection of *"wtf are you doing?"* is there anything that would technically prevent me from doing this, such as a diode between core\_vdd and io\_vdd?


[2026-09-03 5:14 p.m.] 246tnt
No you can't


[2026-09-03 5:15 p.m.] 246tnt
(1) There is a parasitic body diode.
(2) level converters are not the same to up convert or down convert ... so that wouldn't work anyway.

{Reactions}
👍

[2026-09-03 7:16 p.m.] essen__
Thanks tnt 🫡


[2026-09-03 8:02 p.m.] essen__
I was reading the PDK documentation for our IO cells a few days ago, and they mention we don't have circuit under the pad on the IO cells in order to comply with the restrictions of the 3 metal layer process (gf180mcuA). 
So since we are targeting mcuD does this mean there is an opportunity to shorten the io pads by as much as 75um if they where reworked ? 
> The bond pad is non-CUP due to design manual restriction on 3LM.

{Reactions}
😮

[2026-09-04 4:27 a.m.] 246tnt
Given the trouble with bonding I'm not sure I would go to CUP ...


[2026-09-04 11:57 a.m.] archit3ch
Did this get ported to GF180?


[2026-09-04 12:54 p.m.] rtimothyedwards_19428
@Archit3ch :  No, that did not get ported to GF180.  The Chipalooza challenge is a step in that direction.


[2026-09-04 2:30 p.m.] essen__
Started a thread.


[2026-09-04 3:19 p.m.] archit3ch
I have a few ideas... Not at that scale and not with real Xyce models though.


[2026-09-04 3:20 p.m.] namibj
Great. 

Let's chat later starting in like 2 hours from now, or up to a couple hours later than that?


[2026-09-04 3:21 p.m.] namibj
CUP isn't allowed for wedge bonds iirc even at more layers.


[2026-09-04 3:52 p.m.] archit3ch
I'm travelling without a laptop. Currently on the metro. I can share a 1000-foot plan. 🪽


[2026-09-04 3:58 p.m.] mole99
@Tholin Check out your WSLG design in high resolution: https://infosec.exchange/@infosecdj/117213266219165204

Dmitry is working through the dies I sent him, more to follow soon 🤞

{Embed}
DJ🌞:donor: (@infosecdj@infosec.exchange)
https://infosec.exchange/@infosecdj/117213266219165204
Hello [#NakedDieFriday](https://infosec.exchange/tags/NakedDieFriday) fans, hope you did not miss me too much\. Here is this week's eye candy for you\.

Supplied by good folks at [wafer.space/](https://wafer.space/) was a batch of die samples from their first production run\. Here is one of them \-\- a die\-sized doodle of their logo\. It is open source too\: [github.com/89Mods/ws-logo-die](https://github.com/89Mods/ws-logo-die)

There is circuitry there apart from the logo, but the project readme does not say what it does\. \:\-\)

Full\-res map\: [infosecdj.net/map/wafer-space/…](http://infosecdj.net/map/wafer-space/gf180mcu-ws1-wslg/infosecdj_mz_nikpa40x/)
2026-09_media/b2e5cf37b678f90e-CB97D.jpg
Infosec Exchange

{Reactions}
💜 😍

[2026-09-04 3:59 p.m.] namibj
I was thinking maybe a discord voice call whenever convenient for you within the approximate time frame I mentioned?


[2026-09-04 3:59 p.m.] namibj
Add me (discord friend; but let me know so here if you do) if you want btw.


[2026-09-04 5:56 p.m.] essen__
https://discord.com/channels/1361349522684510449/1545289242417307678/1545442323041886250 🫡


[2026-09-06 11:29 a.m.] infosecdj
yeah more of that is coming -- let me know if you want them posted here :)

{Reactions}
👍

[2026-09-06 12:03 p.m.] mole99
Feel free to post the ones you've already imaged, if you like 😊
Once you've finished the whole batch, we can make an announcement for all to see.


[2026-09-06 12:07 p.m.] 246tnt
@Leo Moser (mole99) http://infosecdj.net:8086/map/#wafer-space


[2026-09-06 12:08 p.m.] 246tnt
No TT ones 😢


[2026-09-06 12:16 p.m.] mole99
Yes, it seems that the package prepared by Tim didn't include any of the TTP2/TTPG dies. If you still have any left over, maybe you could get those to Dmitry?


[2026-09-06 12:17 p.m.] infosecdj
I have some from Tim which I did not get to yet, maybe these are the ones?

{Reactions}
🤞

[2026-09-06 12:58 p.m.] 246tnt
I guess we'll find out 😅

{Reactions}
😁

[2026-09-06 2:35 p.m.] infosecdj
some more eye candy for you folks

{Reactions}
❤️ (2)

[2026-09-06 2:35 p.m.] infosecdj
http://infosecdj.net/map/wafer-space/gf180mcu-ws1-mosb/infosecdj_mz_nikpa40x

{Attachments}
2026-09_media/wafer-space_gf180mcu-ws1-mosb_mz_nikpa40x_-A50AA.jpg


[2026-09-06 2:36 p.m.] infosecdj
http://infosecdj.net/map/wafer-space/gf180mcu-ws1-ishi/infosecdj_mz_nikpa40x

{Attachments}
2026-09_media/wafer-space_gf180mcu-ws1-ishi_mz_nikpa40x_-68772.jpg


[2026-09-06 2:36 p.m.] infosecdj
http://infosecdj.net/map/wafer-space/gf180mcu-ws1-as03/infosecdj_mz_nikpa40x

{Attachments}
2026-09_media/wafer-space_gf180mcu-ws1-as03_mz_nikpa40x_-98AF9.jpg


[2026-09-06 2:58 p.m.] namibj
Honestly, I'd expect a spare raw `ttgf0p2` die for such imaging to be easily furnished and it's not like that'd be hard to send to you.


[2026-09-06 3:00 p.m.] infosecdj
Good to know. Let's get back to it after I am through all the samples on hand.


[2026-09-06 5:47 p.m.] tholin
Thinking of designing the PCBs to bring-up my run 2 chips already

{Reactions}
❤️

[2026-09-06 7:32 p.m.] tholin
Do we know yet what the COB PCB layout will be for run 2?


[2026-09-06 9:55 p.m.] jonahsaunders
https://github.com/jonahsaunders/inductor-studio/tree/main

{Embed}
https://github.com/jonahsaunders/inductor-studio/tree/main
GitHub - jonahsaunders/inductor-studio
Contribute to jonahsaunders/inductor-studio development by creating an account on GitHub.
2026-09_media/inductor-studio-9ECA0


[2026-09-06 9:56 p.m.] jonahsaunders
I made this with the new GPT-6 Astra in 20 minutes
Haven't tested it thoroughly, but just did it as a test

{Reactions}
👍

[2026-09-06 11:53 p.m.] tholin
I’m gonna assume the default COB PCB is the same as last time. I did not customize the padring this time.


[2026-09-07 8:35 a.m.] rebelmike
I’m fairly certain pinout won’t change for 1x1. Finer details like number of layers and position of vias might.

Pinout for 1x0p5 might change slightly as the ordering of 4 pins is reversed compared to the die which is likely a recipe for confusion in future

I don’t think 0p5x1 would change, but the run 1 ones aren’t tested yet.

For quarter slot there was talk of using a different connector (fewer pins = cheaper)


[2026-09-07 9:17 a.m.] mithro_
I have no idea what the package was that I gave you 😛

{Reactions}
😆

[2026-09-07 9:18 a.m.] mithro_
These are super cool!


[2026-09-07 9:20 a.m.] mithro_
I would love to host a copy on https://data.wafer.space


[2026-09-07 9:22 a.m.] mithro_
@InfoSecDJ - Could you do an entire wafer? 😛

{Reactions}
🤣

[2026-09-07 9:37 a.m.] infosecdj
Most probably not :D That said, it'd be interesting to have a look at test tiles and features in scribe lanes that got cut


[2026-09-07 9:37 a.m.] infosecdj
I'll give you all the links when I am done with the whole run, feel free to host a copy there


[2026-09-07 9:45 a.m.] namibj
I'd assume a mere full reticle would be most of the interesting content? 
Unless someone considers the edge partials particularly interesting.


[2026-09-07 9:47 a.m.] mithro_
How about the original masks?


[2026-09-07 9:50 a.m.] infosecdj
I could give it a try, though the resolution/magnification will be very low due to the area that needs to be covered. One 1x1 die takes about ~16h to image


[2026-09-07 9:53 a.m.] 246tnt
Masks are 4x larger ?  So 10x magnification of mask is the same as 40x of the die.


[2026-09-07 9:54 a.m.] 246tnt
But yeah still ... full mask is ~ 40x the area of a chip and then there is like ... 25 of them or so ? That's 1.8 year worth 😅


[2026-09-07 9:55 a.m.] infosecdj
The tyranny of numbers :D


[2026-09-07 9:55 a.m.] mithro_
@InfoSecDJ - I think we worked out that my automated microscope (a Labsmore thing from @digshadow)  at PS1 would take roughly like 17 hours to do a mask, which is like one a day.

{Reactions}
👀

[2026-09-07 9:56 a.m.] mithro_
@carlfk and @Andrew Wingate started doing some stuff which got uploaded at https://data.wafer.space/jaguar-ps1/pyuscope/data/scan/


[2026-09-07 9:58 a.m.] infosecdj
All depends on the quality+resolution you want to get :)

{Reactions}
💯

[2026-09-07 10:19 a.m.] mithro_
Always more! 😛

{Reactions}
😂

[2026-09-07 2:54 p.m.] namibj
Started a thread.


[2026-09-07 3:02 p.m.] namibj
Hmmmm at 100nm pixel size if running 20 fps (as a Pi5 could, at least with an LED strobe) and 50% overlap in both directions (so each spot gets nominally 4 captures coverage) it's "just" 34 seconds plus no-capture times caused by whatever acceleration limits the motion stage imposes at the ends of the zig-zag scan.


[2026-09-08 1:03 a.m.] mithro_
I wonder if we should set up something like https://www.honeypotbot.com/ that esden (1bitsquared) just setup on his discord?

{Embed}
https://www.honeypotbot.com/
Home | Honeypot
The official guide to Honeypot, the antispam bot for discord!
2026-09_media/embed-882FC.png

{Reactions}
👍

[2026-09-09 7:49 p.m.] polyfractal
I setup something like that on mine and it's helped a bunch to cut down on spam


[2026-09-09 7:49 p.m.] polyfractal
not perfect, but catches a lot


[2026-09-10 10:05 a.m.] infosecdj
http://infosecdj.net/map/wafer-space/gf180mcu-ws1-ocd1/infosecdj_mz_nikpa40x

{Attachments}
2026-09_media/image-7743D.png

{Reactions}
🏴‍☠️ (3) 😎

[2026-09-10 10:10 a.m.] 246tnt
cc @Tim Edwards


[2026-09-10 4:20 p.m.] infosecdj
good news, I am through all the samples @Leo Moser (mole99) sent me. browsable images here:
http://infosecdj.net/map/#wafer-space
if you need single images and/or previews, ping me for download urls.

{Reactions}
🎉

[2026-09-11 3:05 a.m.] mithro_
These seem pretty cool - https://makerworld.com/en/models/2819094-field-effect-transistor-models-fet-v2#profileId-3139175


==============================================================
Exported 63 message(s)
==============================================================